1. Field of the Invention
The present invention is generally in the field of memory arrays. More particularly, the present invention relates to content addressable memory arrays.
2. Background Art
Conventional CAM (content addressable memory) arrays are typically used in applications requiring high search speeds. A conventional CAM array achieves high search speed by comparing input data to the entire CAM array quickly, for example in one hardware operation, and outputting the address where data uniquely identified by the input data is stored, i.e. outputting the address of a memory location in the CAM array containing data identical to the input data. The conventional CAM array thus accomplishes a search more quickly than, for example, a conventional non-CAM array that must be searched sequentially by an external device or program.
Conventional CAM arrays, while useful in high-speed search applications, have several drawbacks. For example, conventional CAM arrays are more expensive to fabricate than conventional non-CAM arrays, in part because additional circuitry is required for performing searches in hardware. Additionally, conventional CAM arrays are inflexible unless masking techniques are utilized. For example, a conventional CAM array fabricated with 32-bit words is operable as, for example, a 16-bit word CAM array only by masking the unused bits via an external device or program. Such masking is wasteful in terms of, for example, the time needed to perform masking operations and the space unused in the conventional CAM array.
Thus, there is a need in the art for a CAM array that overcomes disadvantages of conventional CAM arrays.